I have just compiled and run a 4.7 kernel on my development ERL-3 which doesn't do much routing. It has been stable and running for about 12 hours without problems though more time in a routing environment will be necessary. The best thing about 4.7 is that ubnt-e100 is now built in to the mainline kernel so no patching of the dts/dtsi or cavium-octeon setup files have been necessary. My revision number is due to using an inherited config file generated for my 'production' router kernel 4.5.1 which has been stable for a few months. A lot of my kernel fuctionality is in modules loaded at boot time.
Plainly the Cavium team have been contributing to the mainline kernels. Thanks to them.
login as: root
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Debian Version 8.5
Linux Version 4.7.0ubnt_e100R1, Compiled #1 SMP Mon Aug 8 18:22:42 BST 2016
Two MIPS Cavium Processors, 390M RAM, 2000.00 Bogomips Total
NSDEV
Debian GNU/Linux 8 \n \l
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The programs included with the Debian GNU/Linux system are free software;
the exact distribution terms for each program are described in the
individual files in /usr/share/doc/*/copyright.
Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
permitted by applicable law.
Last login: Mon Aug 8 20:28:30 2016 from 192.168.2.47
root@NSDEV:~# cd /
root@NSDEV:/#root@NSDEV:/# cat /proc/cpuinfo system type : UBNT_E100 (CN5020p1.1-500-SCP) machine : Unknown processor : 0 cpu model : Cavium Octeon+ V0.1 BogoMIPS : 1000.00 wait instruction : yes microsecond timers : yes tlb_entries : 64 extra interrupt vector : yes hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb] isa : mips2 mips3 mips4 mips5 mips64r2 ASEs implemented : shadow register sets : 1 kscratch registers : 0 package : 0 core : 0 VCED exceptions : not available VCEI exceptions : not available processor : 1 cpu model : Cavium Octeon+ V0.1 BogoMIPS : 1000.00 wait instruction : yes microsecond timers : yes tlb_entries : 64 extra interrupt vector : yes hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb] isa : mips2 mips3 mips4 mips5 mips64r2 ASEs implemented : shadow register sets : 1 kscratch registers : 0 package : 0 core : 1 VCED exceptions : not available VCEI exceptions : not available
There will still be the issue of BIND application assertion failures (which seem to be due to linked list pointer failures within BIND) and the built in hardware acceleration (Packet Order/Work (POW) unit) engine of the Octeon II hardware needs to be attended to. I can see that the POW engine is run by a UBNT VyOS application rather than by the kernel per se. The crypto engine is, I think, built in to the new kernel by default.
I gave up running my NTP servers on the ERL-3's and am now running that function on a pair of redundant 2012 vintage RaspberryPi's.